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K60P100M100SF2RM Datasheet, PDF (1172/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual
Memory Map/Register Definition
ENET_TCCRn field descriptions
Field
31–0
TCC
Timer Capture Compare
Description
This register is double buffered between the module clock and 1588 clock domains.
When configured for compare, 1588 clock domain updates with the value in the module clock domain
whenever the Timer Channel is first enabled and on each subsequent compare. Write to this register with
the first compare value before enabling the Timer Channel. When the Timer Channel is enabled, write the
second compare value either immediately or at least before the first compare occurs. After each compare,
write the next compare value before the previous compare occurs and before clearing the Timer Flag.
The compare occurs one 1588 clock cycle after the IEEE 1588 Counter increments past the compare
value in the 1588 clock domain. If the compare value is less than the value of the 1588 Counter when the
Timer Channel is first enabled, then the compare does not occur until following the next overflow of the
1588 Counter. If the compare value is greater than the IEEE 1588 Counter when the 1588 Counter
overflows, or the compare value is less than the value of the IEEE 1588 Counter after the overflow, then
the compare occurs one 1588 clock cycle following the overflow.
When configured for Capture, the value of the IEEE 1588 Counter is captured into the 1588 clock domain
and then updated into the module clock domain provided the Timer Flag is clear. Always read the capture
value before clearing the Timer Flag.
44.3.43 Statistic Event Counters
The following table shows the locations of the statistic event counters in the module's
memory map. Definitions of these registers can be found in IETF RFC 2819, Remote
Network Monitoring Management Information Base.
NOTE
All counters are 32-bit wide with the top 16 bits reserved/
ignored except for the following:
• RMON_T_OCTETS
• IEEE_T_OCTETS_OK
• RMON_R_OCTETS
• IEEE_R_OCTETS_OK
Table 44-54. Statistic Event Counters Memory Map
Address offset from ENET base address
0x200
Register
Count of frames not counted correctly (RMON_T_DROP).
NOTE: Counter not implemented (read 0 always) as not
applicable.
0x204
RMON Tx packet count (RMON_T_PACKETS)
0x208
RMON Tx Broadcast Packets (RMON_T_BC_PKT)
0x20C
RMON Tx Multicast Packets (RMON_T_MC_PKT)
Table continues on the next page...
1172
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.