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K60P100M100SF2RM Datasheet, PDF (1523/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual
Chapter 51 Universal Asynchronous Receiver/Transmitter (UART)
51.3.31 UART 7816 Transmit Length Register (UARTx_TL7816)
The TL7816 register is used to indicate how many characters are contained in the block
being transmitted. This register is only used when C7816[TTYPE] = 1. This register may
be read at anytime. This register should only be written when C2[TE] is not enabled.
Addresses: UART0_TL7816 is 4006_A000h base + 1Fh offset = 4006_A01Fh
UART1_TL7816 is 4006_B000h base + 1Fh offset = 4006_B01Fh
UART2_TL7816 is 4006_C000h base + 1Fh offset = 4006_C01Fh
UART3_TL7816 is 4006_D000h base + 1Fh offset = 4006_D01Fh
UART4_TL7816 is 400E_A000h base + 1Fh offset = 400E_A01Fh
Bit
7
6
5
4
3
2
1
0
Read
Write
TLEN
Reset
0
0
0
0
0
0
0
0
UARTx_TL7816 field descriptions
Field
7–0
TLEN
Transmit Length
Description
This value plus 4 indicates the number of characters contained in the block being transmitted. This
register is automatically decremented by 1 for each character in the information field portion of the block.
Additionally, this register is automatically decremented by 1 for the first character of a CRC in the epilogue
field. Hence, this register should be programmed with the number of bytes in the data packet if a LRC is
being transmitted, and the number of bytes + 1 if a CRC is being transmitted. This register is not
decremented for characters that are assumed to be part of the Prologue field (first three characters
transmitted in a block) or the LRC or last CRC character in the Epilogue field (last character transmitted).
This field should only be programed or adjusted when C2[TE] is cleared.
51.4 Functional description
This section provides a complete functional description of the UART block.
The UART allows full duplex, asynchronous, NRZ serial communication between the
CPU and remote devices, including other CPUs. The UART transmitter and receiver
operate independently, although they use the same baud rate generator. The CPU
monitors the status of the UART, writes the data to be transmitted, and processes
received data.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1523