K60P100M100SF2RM Datasheet, PDF (1320/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map/Register Definition
CANx_MCR field descriptions (continued)
Field
Description
frame is sent in the CAN bus without notification. This bit can only be written in Freeze mode as it is
blocked by hardware in other modes.
NOTE: When MCR[AEN] is asserted, only the abort mechanism (see Section "Transmission Abort
Mechanism") must be used for updating Mailboxes configured for transmission.
CAUTION: Writing the Abort code into Rx Mailboxes can cause unpredictable results when the
MCR[AEN] is asserted.
11–10
Reserved
9–8
IDAM
0 Abort disabled
1 Abort enabled
This read-only field is reserved and always has the value zero.
ID Acceptance Mode
This 2-bit field identifies the format of the Rx FIFO ID Filter Table Elements. Note that all elements of the
table are configured at the same time by this field (they are all the same format). See Section "Rx FIFO
Structure". This field can only be written in Freeze mode as it is blocked by hardware in other modes.
7
Reserved
6–0
MAXMB
00 Format A: One full ID (standard and extended) per ID Filter Table element.
01 Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table
element.
10 Format C: Four partial 8-bit Standard IDs per ID Filter Table element.
11 Format D: All frames rejected.
This read-only field is reserved and always has the value zero.
Number of the Last Message Buffer
This 7-bit field defines the number of the last Message Buffers that will take part in the matching and
arbitration processes. The reset value (0x0F) is equivalent to 16 MB configuration. This field can only be
written in Freeze Mode as it is blocked by hardware in other modes.
Number of the last MB = MAXMB
NOTE: MAXMB must be programmed with a value smaller than the parameter NUMBER_OF_MB,
otherwise the number of the last effective Message Buffer will be: (NUMBER_OF_MB - 1)
Additionally, the value of MAXMB must encompass the FIFO size defined by CTRL2[RFFN]. MAXMB also
impacts the definition of the minimum number of peripheral clocks per CAN bit as described in Table
"Minimum Ratio Between Peripheral Clock Frequency and CAN Bit Rate" (in Section "Arbitration and
Matching Timing").
1320
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.