K60P100M100SF2RM Datasheet, PDF (1764/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory map and register definition
TSI memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access
Reset value
4004_5154 Channel n threshold register (TSI0_THRESHLD13)
32
R/W 0000_0000h
4004_5158 Channel n threshold register (TSI0_THRESHLD14)
32
R/W 0000_0000h
4004_515C Channel n threshold register (TSI0_THRESHLD15)
32
R/W 0000_0000h
Section/
page
55.6.6/
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55.6.6/
1777
55.6.6/
1777
55.6.1 General Control and Status Register (TSIx_GENCS)
All GENCS bits can be read at any time, but must not be written while GENCS[SCNIP]
is set.
Addresses: TSI0_GENCS is 4004_5000h base + 0h offset = 4004_5000h
Bit 31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
0
LPSCNITV
NSCN
PS
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
0
W w1c w1c w1c w1c
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TSIx_GENCS field descriptions
Field
31
Reserved
30–29
Reserved
28
LPCLKS
Reserved
Description
This field is reserved.
This read-only field is reserved and always has the value zero.
Low Power Mode Clock Source Selection
Table continues on the next page...
1764
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.