K60P100M100SF2RM Datasheet, PDF (126/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Analog
3.7.2.3 External window/sample input
PDB pulse-out controls the CMP Sample/Window timing.
3.7.3 12-bit DAC Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Peripheral bus
controller 0
Register
access
Transfers
Other peripherals
12-bit DAC
Module signals
Topic
Full description
System memory map
Clocking
Power management
Signal multiplexing
Figure 3-41. 12-bit DAC configuration
Table 3-49. Reference links to related information
Related module
12-bit DAC
Port control
Reference
12-bit DAC
System memory map
Clock distribution
Power management
Signal multiplexing
3.7.3.1 12-bit DAC Overview
This device contains one 12-bit digital-to-analog converter (DAC) with programmable
reference generator output. The DAC includes a FIFO for DMA support.
3.7.3.2 12-bit DAC Output
The output of the DAC can be placed on an external pin or set as one of the inputs to the
analog comparator or ADC.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
126
Freescale Semiconductor, Inc.