K60P100M100SF2RM Datasheet, PDF (405/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
3–0
Reserved
Chapter 19 Peripheral Bridge (AIPS-Lite)
AIPSx_MPRA field descriptions (continued)
Description
This read-only field is reserved and always has the value zero.
19.2.2 Peripheral Access Control Register (AIPSx_PACRn)
Each of the peripherals has a four-bit PACR[0:127] field which defines the access levels
supported by the given module. Eight PACR fields are grouped together to form a 32-bit
PACR[A:P] register:
• PACRA-P define the access levels for the 128 peripherals
The peripheral assignments to each PACR register is defined by the memory map slot
that the peripherals are assigned.See the device's Memory Map details for the
assignments for your particular device.
NOTE
The reset value of the PACRA-D registers is 0x4444_4444.
The following table shows the top-level structure of the PACR registers.
Offset
0x20
0x24
0x28
0x2C
0x30
0x34
0x38
0x3C
0x40
0x44
0x48
0x4C
0x50
0x54
0x58
0x5C
Register [31:28]
PACRA PACR0
PACRB PACR8
PACRC PACR16
PACRD PACR24
Reserved
Reserved
Reserved
Reserved
PACRE PACR32
PACRF PACR40
PACRG PACR48
PACRH PACR56
PACRI
PACR64
PACRJ PACR72
PACRK PACR80
PACRL PACR88
[27:24]
PACR1
PACR9
PACR17
PACR25
[23:20]
PACR2
PACR10
PACR18
PACR26
[19:16]
PACR3
PACR11
PACR19
PACR27
[15:12]
PACR4
PACR12
PACR20
PACR28
PACR33
PACR41
PACR49
PACR57
PACR65
PACR73
PACR81
PACR89
PACR34
PACR42
PACR50
PACR58
PACR66
PACR74
PACR82
PACR90
PACR35
PACR43
PACR51
PACR59
PACR67
PACR75
PACR83
PACR91
PACR36
PACR44
PACR52
PACR60
PACR68
PACR76
PACR84
PACR92
Table continues on the next page...
[11:8]
PACR5
PACR13
PACR21
PACR29
PACR37
PACR45
PACR53
PACR61
PACR69
PACR77
PACR85
PACR93
[7:4]
PACR6
PACR14
PACR22
PACR30
PACR38
PACR46
PACR54
PACR62
PACR70
PACR78
PACR86
PACR94
[3:0]
PACR7
PACR15
PACR23
PACR31
PACR39
PACR47
PACR55
PACR63
PACR71
PACR79
PACR87
PACR95
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
405