K60P100M100SF2RM Datasheet, PDF (46/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Section Number
Title
Page
48.4.11 Bus Interface................................................................................................................................................1385
48.5 Initialization/Application Information..........................................................................................................................1386
48.5.1 FlexCAN Initialization Sequence................................................................................................................1386
Chapter 49
SPI (DSPI)
49.1 Introduction...................................................................................................................................................................1389
49.1.1 Block Diagram.............................................................................................................................................1389
49.1.2 Features........................................................................................................................................................1390
49.1.3 DSPI Configurations....................................................................................................................................1391
49.1.4 Modes of Operation.....................................................................................................................................1392
49.2 DSPI Signal Descriptions.............................................................................................................................................1394
49.2.1 PCS0/SS — Peripheral Chip Select/Slave Select........................................................................................1394
49.2.2 PCS1 - PCS3 — Peripheral Chip Selects 1 - 3............................................................................................1394
49.2.3 PCS4 — Peripheral Chip Select 4................................................................................................................1395
49.2.4 PCS5/PCSS — Peripheral Chip Select 5/Peripheral Chip Select Strobe.....................................................1395
49.2.5 SIN — Serial Input......................................................................................................................................1395
49.2.6 SOUT — Serial Output................................................................................................................................1395
49.2.7 SCK — Serial Clock....................................................................................................................................1395
49.3 Memory Map/Register Definition.................................................................................................................................1396
49.3.1 DSPI Module Configuration Register (SPIx_MCR)....................................................................................1399
49.3.2 DSPI Transfer Count Register (SPIx_TCR)................................................................................................1402
49.3.3 DSPI Clock and Transfer Attributes Register (In Master Mode) (SPIx_CTARn)......................................1402
49.3.4 DSPI Clock and Transfer Attributes Register (In Slave Mode) (SPIx_CTARn_SLAVE)..........................1407
49.3.5 DSPI Status Register (SPIx_SR)..................................................................................................................1408
49.3.6 DSPI DMA/Interrupt Request Select and Enable Register (SPIx_RSER)..................................................1411
49.3.7 DSPI PUSH TX FIFO Register In Master Mode (SPIx_PUSHR)...............................................................1413
49.3.8 DSPI PUSH TX FIFO Register In Slave Mode (SPIx_PUSHR_SLAVE)..................................................1415
49.3.9 DSPI POP RX FIFO Register (SPIx_POPR)...............................................................................................1415
49.3.10 DSPI Transmit FIFO Registers (SPIx_TXFRn)...........................................................................................1416
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
46
Freescale Semiconductor, Inc.