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K60P100M100SF2RM Datasheet, PDF (130/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual | |||
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Timers
3.8.1.3 Back-to-back acknowledgement connections
In this MCU, PDB back-to-back operation acknowledgment connections are
implemented as follows:
⢠PDB channel 0 pre-trigger 0 acknowledgement input: ADC1SC1B_COCO
⢠PDB channel 0 pre-trigger 1 acknowledgement input: ADC0SC1A_COCO
⢠PDB channel 1 pre-trigger 0 acknowledgement input: ADC0SC1B_COCO
⢠PDB channel 1 pre-trigger 1 acknowledgement input: ADC1SC1A_COCO
So, the back-to-back chain is connected as a ring:
Channel 0
pre-trigger 0
Channel 1
pre-trigger 1
Channel 0
pre-trigger 1
Channel 1
pre-trigger 0
Figure 3-44. PDB back-to-back chain
The application code can set the PDBx_CHnC1[BB] bits to configure the PDB pre-
triggers as a single chain or several chains.
3.8.1.4 PDB Interval Trigger Connections to DAC
In this MCU, PDB interval trigger connections to DAC are implemented as follows.
⢠PDB interval trigger 0 connects to DAC0 hardware trigger input.
3.8.1.5 DAC External Trigger Input Connections
In this MCU, two DAC external trigger inputs are implemented.
⢠DAC external trigger input 0: ADC0SC1A_COCO
⢠DAC external trigger input 1: ADC1SC1A_COCO
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
130
Freescale Semiconductor, Inc.
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