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K60P100M100SF2RM Datasheet, PDF (755/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual
CRC memory map
Chapter 31 Cyclic redundancy check (CRC)
Absolute
address
(hex)
Register name
4003_2000 CRC Data Register (CRC_CRC)
4003_2004 CRC Polynomial Register (CRC_GPOLY)
4003_2008 CRC Control Register (CRC_CTRL)
Width
(in bits)
Access
Reset value
Section/
page
32
R/W
FFFF_
FFFFh
31.2.1/
755
32
R/W 0000_1021h
31.2.2/
756
32
R/W 0000_0000h
31.2.3/
757
31.2.1 CRC Data Register (CRC_CRC)
The CRC data register contains the value of the seed, data, and checksum. When the
CTRL[WAS] bit is set, any write to the data register is regarded as the seed value. When
the CTRL[WAS] bit is cleared, any write to the data register is regarded as data for
general CRC computation.
In 16-bit CRC mode, the HU and HL fields are not used for programming the seed value,
and reads of these fields return an indeterminate value. In 32-bit CRC mode, all fields are
used for programming the seed value.
When programming data values, the values can be written 8 bits, 16 bits, or 32 bits at a
time, provided all bytes are contiguous; with MSB of data value written first.
After all data values are written, the CRC result can be read from this data register. In 16-
bit CRC mode, the CRC result is available in the LU and LL fields. In 32-bit CRC mode,
all fields contain the result. Reads of this register at any time return the intermediate CRC
value, provided the CRC module is configured.
Address: CRC_CRC is 4003_2000h base + 0h offset = 4003_2000h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
HU
HL
LU
LL
W
Reset 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CRC_CRC field descriptions
Field
31–24
HU
CRC High Upper Byte
Description
In 16-bit CRC mode (the CTRL[TCRC] bit is 0), this field is not used for programming a seed value. In 32-
bit CRC mode (the CTRL[TCRC] bit is 1), values written to this field are part of the seed value when the
CTRL[WAS] bit is 1. When the CTRL[WAS] bit is 0, data written to this field is used for CRC checksum
generation in both 16-bit and 32-bit CRC modes.
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
755