K60P100M100SF2RM Datasheet, PDF (1360/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional Description
• If C/S write is performed in the arbitration winner, a new process is restarted
immediately.
• If C/S write is performed in a MB whose number is higher than the Tx arbitration
pointer, the ongoing arbitration process will scan this MB as normal.
48.4.3 Receive Process
To be able to receive CAN frames into a Mailbox, the CPU must prepare it for reception
by executing the following steps:
1. If the Mailbox is active (either Tx or Rx) inactivate the Mailbox (see Section
"Message Buffer Inactivation"), preferably with a safe inactivation (see Transmission
Abort Mechanism).
2. Write the ID word
3. Write the EMPTY code (0b0100) to the CODE field of the Control and Status word
to activate the Mailbox.
Once the MB is activated, it will be able to receive frames that match the programmed
filter. At the end of a successful reception, the Mailbox is updated by the move-in process
(see Section "Move-in") as follows:
1. The received Data field (8 bytes at most) is stored.
2. The received Identifier field is stored.
3. The value of the Free Running Timer at the time of the second bit of frame’s
Identifier field is written into the Mailbox’s Time Stamp field.
4. The received SRR, IDE, RTR and DLC fields are stored.
5. The CODE field in the Control and Status word is updated (see Table 48-109 and
Table 48-110 in Section Message Buffer Structure).
6. A status flag is set in the Interrupt Flag Register and an interrupt is generated if
allowed by the corresponding Interrupt Mask Register bit.
The recommended way for CPU servicing (read) the frame received in an Mailbox is
using the following procedure:
1. Read the Control and Status word of that Mailbox.
2. Check if the BUSY bit is deasserted, indicating that the Mailbox is locked. Repeat
step 1) while it is asserted. See Section "Message Buffer Lock Mechanism".
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.