K60P100M100SF2RM Datasheet, PDF (944/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map and Register Definition
Table 39-67. Mode, Edge, and Level Selection (continued)
DECAPEN
0
COMBINE
0
1
1
0
CPWMS
0
1
0
0
MSnB:MSnA
0
1
1X
XX
XX
X0
X1
ELSnB:ELSnA
Mode
Configuration
1
Input capture
Capture on
Rising Edge
Only
10
Capture on
Falling Edge
Only
11
Capture on
Rising or Falling
Edge
1
Output compare Toggle Output
on match
10
Clear Output on
match
11
Set Output on
match
10
Edge-aligned
High-true
PWM
pulses (clear
Output on
match)
X1
Low-true pulses
(set Output on
match)
10
Center-aligned
High-true
PWM
pulses (clear
Output on
match-up)
X1
Low-true pulses
(set Output on
match-up)
10
Combine PWM
High-true
pulses (set on
channel (n)
match, and
clear on
channel (n+1)
match)
X1
Low-true pulses
(clear on
channel (n)
match, and set
on channel (n
+1) match)
See the
following table
(Table 39-8).
Dual Edge
Capture Mode
One-shot
capture mode
Continuous
capture mode
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
944
Freescale Semiconductor, Inc.