K60P100M100SF2RM Datasheet, PDF (247/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chip signal name
I2C1_SCL
I2C1_SDA
Chip signal name
UART0_CTS
UART0_RTS
UART0_TX
UART0_RX
Chip signal name
UART1_CTS
UART1_RTS
UART1_TX
UART1_RX
Chip signal name
UART2_CTS
UART2_RTS
UART2_TX
UART2_RX
Chip signal name
UART3_CTS
UART3_RTS
UART3_TX
UART3_RX
Chapter 10 Signal Multiplexing and Signal Descriptions
Table 10-25. I²C 1 Signal Descriptions
Module signal Description
I/O
name
SCL
Bidirectional serial clock line of the I²C system.
I/O
SDA
Bidirectional serial data line of the I²C system.
I/O
Table 10-26. UART 0 Signal Descriptions
Module signal Description
I/O
name
CTS
Clear to send
I
RTS
Request to send
O
TXD
Transmit data
O
RXD
Receive data
I
Table 10-27. UART 1 Signal Descriptions
Module signal Description
I/O
name
CTS
Clear to send
I
RTS
Request to send
O
TXD
Transmit data
O
RXD
Receive data
I
Table 10-28. UART 2 Signal Descriptions
Module signal Description
I/O
name
CTS
Clear to send
I
RTS
Request to send
O
TXD
Transmit data
O
RXD
Receive data
I
Table 10-29. UART 3 Signal Descriptions
Module signal Description
I/O
name
CTS
Clear to send
I
RTS
Request to send
O
TXD
Transmit data
O
RXD
Receive data
I
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
247