English
Language : 

K60P100M100SF2RM Datasheet, PDF (546/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual
Memory Map/Register Definition
MCG_C4 field descriptions (continued)
Field
4–1
FCTRIM
0
SCFTRIM
10 Encoding 2 — Mid-high range.
11 Encoding 3 — High range.
Description
Fast Internal Reference Clock Trim Setting
FCTRIM 1 controls the fast internal reference clock frequency by controlling the fast internal reference
clock period. The FCTRIM bits are binary weighted (that is, bit 1 adjusts twice as much as bit 0).
Increasing the binary value increases the period, and decreasing the value decreases the period.
If an FCTRIM[3:0] value stored in nonvolatile memory is to be used, it is your responsibility to copy that
value from the nonvolatile memory location to this register.
Slow Internal Reference Clock Fine Trim
SCFTRIM 2 controls the smallest adjustment of the slow internal reference clock frequency. Setting
SCFTRIM increases the period and clearing SCFTRIM decreases the period by the smallest amount
possible.
If an SCFTRIM value stored in nonvolatile memory is to be used, it is your responsibility to copy that value
from the nonvolatile memory location to this bit.
1. A value for FCTRIM is loaded during reset from a factory programmed location .
2. A value for SCFTRIM is loaded during reset from a factory programmed location .
24.3.5 MCG Control 5 Register (MCG_C5)
Address: MCG_C5 is 4006_4000h base + 4h offset = 4006_4004h
Bit
7
6
5
4
3
2
1
0
Read
0
Write
PRDIV
Reset
Field
7
Reserved
6
PLLCLKEN
0
0
0
0
0
0
0
0
MCG_C5 field descriptions
Description
This read-only field is reserved and always has the value zero.
PLL Clock Enable
Enables the PLL independent of PLLS and enables the PLL clock for use as MCGPLLCLK. (PRDIV
needs to be programmed to the correct divider to generate a PLL reference clock in the range of 2 - 4
MHz range prior to setting the PLLCLKEN bit). Setting PLLCLKEN will enable the external oscillator if
not already enabled. Whenever the PLL is being enabled by means of the PLLCLKEN bit, and the
external oscillator is being used as the reference clock, the OSCINIT bit should be checked to make
sure it is set.
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
546
Freescale Semiconductor, Inc.