K60P100M100SF2RM Datasheet, PDF (531/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 23 Watchdog Timer (WDOG)
WDOG_UNLOCK field descriptions
Field
Description
15–0
WDOGUNLOCK
You can write the unlock sequence values to this register to make the watchdog write once registers
writable again. The required unlock sequence is 0xC520 followed by 0xD928 within 20 bus clock cycles. A
valid unlock sequence opens up a window equal in length to the WCT within which you can update the
registers. Writing a value other than the above mentioned sequence or if the sequence is longer than 20
bus cycles, resets the system or if IRQRSTEN is set, it interrupts and then resets the system). The unlock
sequence is effective only if ALLOWUPDATE is set.
23.7.9 Watchdog Timer Output Register High (WDOG_TMROUTH)
Address: WDOG_TMROUTH is 4005_2000h base + 10h offset = 4005_2010h
Bit 15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
Write
TIMEROUTHIGH
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
WDOG_TMROUTH field descriptions
Field
Description
15–0
Shows the value of the upper 16 bits of the watchdog timer.
TIMEROUTHIGH
23.7.10 Watchdog Timer Output Register Low (WDOG_TMROUTL)
During stop mode, the WDOG_TIMER_OUT will be caught at the pre-stop value of the
watchdog timer. After exiting stop mode, a maximum delay of 1 WDOG_CLK cycle + 3
bus clock cycles will occur before the WDOG_TIMER_OUT starts following the
watchdog timer.
Address: WDOG_TMROUTL is 4005_2000h base + 12h offset = 4005_2012h
Bit 15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
Write
TIMEROUTLOW
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
WDOG_TMROUTL field descriptions
Field
Description
15–0
Shows the value of the lower 16 bits of the watchdog timer.
TIMEROUTLOW
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
531