K60P100M100SF2RM Datasheet, PDF (1327/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
31–0
RX14M[31:0]
CANx_RX14MASK field descriptions
Chapter 48 CAN (FlexCAN)
Rx Buffer 14 Mask Bits
Description
Each mask bit masks the corresponding Mailbox 14 filter field in the same way that RXMGMASK masks
other Mailboxes' filters. See the description of the CAN_RXMGMASK register.
0 The corresponding bit in the filter is "don’t care."
1 The corresponding bit in the filter is checked.
48.3.7 Rx 15 Mask Register (CANx_RX15MASK)
This register is located in RAM.
RX15MASK is provided for legacy support. When the MCR[IRMQ] bit is asserted,
RX15MASK has no effect.
RX15MASK is used to mask the filter fields of Message Buffer 15.
This register can only be programmed while the module is in Freeze Mode as it is
blocked by hardware in other modes.
Addresses: CAN0_RX15MASK is 4002_4000h base + 18h offset = 4002_4018h
CAN1_RX15MASK is 400A_4000h base + 18h offset = 400A_4018h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
RX15M[31:0]
W
Reset 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CANx_RX15MASK field descriptions
Field
31–0
RX15M[31:0]
Rx Buffer 15 Mask Bits
Description
Each mask bit masks the corresponding Mailbox 15 filter field in the same way that RXMGMASK masks
other Mailboxes' filters. See the description of the CAN_RXMGMASK register.
0 The corresponding bit in the filter is "don’t care."
1 The corresponding bit in the filter is checked.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1327