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K60P100M100SF2RM Datasheet, PDF (1017/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual
update OUTMASK register at
each rising edge of system clock
begin
0 = SYNCHOM = 1
bit ?
Chapter 39 FlexTimer (FTM)
update OUTMASK register by
PWM synchronization
no =
rising edge
of system
clock ?
= yes
update OUTMASK
with its buffer value
end
OUTMASK is updated
by software trigger
1 = SWOM
bit ?
0=
SWSYNC
software
trigger
bit ?
=1
=0
end
update OUTMASK
with its buffer value
end
1 = SYNCMODE = 0
bit ?
legacy
PWM synchronization
enhanced PWM synchronization
0=
end
OUTMASK is updated
by hardware trigger
HWOM = 1
bit ?
hardware
trigger
TRIGn
bit ?
=0
=1
wait hardware trigger n
update OUTMASK
with its buffer value
HWTRIGMODE = 1
bit ?
=0
clear TRIGn bit
end
Figure 39-214. OUTMASK Register Synchronization Flowchart
In the case of legacy PWM synchronization, the OUTMASK register synchronization
depends on PWMSYNC bit according to the following description.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1017