K60P100M100SF2RM Datasheet, PDF (347/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
1
WUF1
0
WUF0
Chapter 15 Low-leakage wake-up unit (LLWU)
LLWU_F1 field descriptions (continued)
Wakeup Flag for LLWU_P1
Description
Indicates that an enabled external wakeup pin was a source of exiting LLS or VLLS. To clear the flag write
a one to WUF1.
0 LLWU_P1 input was not a source of wakeup from LLS or VLLS mode
1 LLWU_P1 input was a source of wakeup from LLS or VLLS mode
Wakeup Flag for LLWU_P0
Indicates that an enabled external wakeup pin was a source of exiting LLS or VLLS. To clear the flag write
a one to WUF0.
0 LLWU_P0 input was not a source of wakeup from LLS or VLLS mode
1 LLWU_P0 input was a source of wakeup from LLS or VLLS mode
15.3.7 LLWU Flag 2 Register (LLWU_F2)
LLWU_F2 contains the wakeup flags indicating which wakeup source caused the MCU
to exit LLS or VLLS mode. For LLS, this will be the source causing the CPU interrupt
flow. For VLLS, this will be the source causing the MCU reset flow.
The external wakeup flags are read only and clearing a flag is accomplished by a write of
a one to the corresponding WUFx bit. The wakeup flag (WUFx) if set will remain set if
the associated WUPEx bit is cleared.
NOTE
This register is unaffected by wakeup from low leakage modes
(exit from LLS via RESET or any exit from VLLS).
Address: LLWU_F2 is 4007_C000h base + 6h offset = 4007_C006h
Bit
Read
Write
Reset
7
WUF15
w1c
0
6
WUF14
w1c
0
5
WUF13
w1c
0
4
WUF12
w1c
0
3
WUF11
w1c
0
2
WUF10
w1c
0
1
WUF9
w1c
0
0
WUF8
w1c
0
LLWU_F2 field descriptions
Field
7
WUF15
Wakeup Flag for LLWU_P15
Description
Indicates that an enabled external wakeup pin was a source of exiting LLS or VLLS. To clear the flag write
a one to WUF15.
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
347