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K60P100M100SF2RM Datasheet, PDF (1465/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual
Chapter 50 Inter-Integrated Circuit (I2C)
address matching process.If the Range Address register is programmed to a nonzero
value, the range address itself participates in the address matching process. If the RMEN
bit is set, any address within the range of values of the Address Register 1 and the Range
Address register participates in the address matching process. The Range Address register
must be programmed to a value greater than the value of the Address Register 1.
When the I2C module responds to one of these addresses, it acts as a slave-receiver and
the IAAS bit is set after the address cycle. Software must read the Data register after the
first byte transfer to determine that the address is matched.
50.4.4 System Management Bus Specification
SMBus provides a control bus for system and power management related tasks. A system
can use SMBus to pass messages to and from devices instead of tripping individual
control lines. Removing the individual control lines reduces pin count. Accepting
messages ensures future expandability. With the system management bus, a device can
provide manufacturer information, tell the system what its model/part number is, save its
state for a suspend event, report different types of errors, accept control parameters, and
return its status.
50.4.4.1 Timeouts
The TTIMEOUT,MIN parameter allows a master or slave to conclude that a defective device
is holding the clock low indefinitely or a master is intentionally trying to drive devices
off the bus. It is highly recommended that a slave device release the bus (stop driving the
bus and let SCL and SDA float high) when it detects any single clock held low longer
than TTIMEOUT,MIN. Devices that have detected this condition must reset their
communication and be able to receive a new START condition within the timeframe of
TTIMEOUT,MAX.
SMBus defines a clock low timeout, TTIMEOUT, of 35 ms, specifies TLOW:SEXT as the
cumulative clock low extend time for a slave device, and specifies TLOW:MEXT as the
cumulative clock low extend time for a master device.
50.4.4.1.1 SCL Low Timeout
If the SCL line is held low by a slave device on the bus, no further communication is
possible. Furthermore, the master cannot force the SCL line high to correct the error
condition. To solve this problem, the SMBus protocol specifies that devices participating
in a transfer must detect any clock cycle held low longer than a timeout value condition.
Devices that have detected the timeout condition must reset the communication. When
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
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