K60P100M100SF2RM Datasheet, PDF (530/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map and Register Definition
23.7.6 Watchdog Window Register Low (WDOG_WINL)
You must set the Window Register value lower than the Time-out Value Register.
Address: WDOG_WINL is 4005_2000h base + Ah offset = 4005_200Ah
Bit 15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
Write
WINLOW
Reset 0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
WDOG_WINL field descriptions
Field
15–0
WINLOW
Description
Defines the lower 16 bits of the 32-bit window for the windowed mode of operation of the watchdog. It is
defined in terms of cycles of the pre-scaled watchdog clock. In this mode, the watchdog can be refreshed
only when the timer reaches a value greater than or equal to this window length value. A refresh outside
this window resets the system or if IRQRSTEN is set, it interrupts and then resets the system.
23.7.7 Watchdog Refresh Register (WDOG_REFRESH)
Address: WDOG_REFRESH is 4005_2000h base + Ch offset = 4005_200Ch
Bit 15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
Write
WDOGREFRESH
Reset 1
0
1
1
0
1
0
0
1
0
0
0
0
0
0
0
WDOG_REFRESH field descriptions
Field
Description
15–0
WDOGREFRES
H
Watchdog refresh register. A sequence of 0xA602 followed by 0xB480 within 20 bus clock cycles when
written to this register, refreshes the WDOG and prevents it from resetting the system. Writing a value
other than the above mentioned sequence or if the sequence is longer than 20 bus cycles, resets the
system or if IRQRSTEN is set, it interrupts and then resets the system).
23.7.8 Watchdog Unlock Register (WDOG_UNLOCK)
Address: WDOG_UNLOCK is 4005_2000h base + Eh offset = 4005_200Eh
Bit 15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
Write
WDOGUNLOCK
Reset 1
1
0
1
1
0
0
1
0
0
1
0
1
0
0
0
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
530
Freescale Semiconductor, Inc.