K60P100M100SF2RM Datasheet, PDF (1232/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional Description
If the PHY detects an error on the frame received from the line, the PHY asserts the MII
error signal, MII_RXER, for at least one clock cycle at any time during the packet
transfer.
Preamble
SFD
CRC-32
MII_RXCLK
MII_RXD[3:0]
5
MII_RXDV
MII_RXER
Figure 44-76. MII Receive Operation — Errored Frame
A frame received on the MII interface with a PHY error indication is subsequently
transferred on the FIFO interface with RxBD[ME] set.
1232
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.