K60P100M100SF2RM Datasheet, PDF (330/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

PMC Memory Map/Register Definition
Address: PMC_LVDSC1 is 4007_D000h base + 0h offset = 4007_D000h
Bit
Read
Write
Reset
7
LVDF
0
6
0
LVDACK
0
5
LVDIE
0
4
LVDRE
1
3
2
0
0
0
1
0
LVDV
0
0
PMC_LVDSC1 field descriptions
Field
7
LVDF
Low-Voltage Detect Flag
Description
This read-only status bit indicates a low-voltage detect event.
6
LVDACK
5
LVDIE
0 Low-voltage event not detected
1 Low-voltage event detected
Low-Voltage Detect Acknowledge
This write-only bit is used to acknowledge low voltage detection errors (write 1 to clear LVDF). Reads
always return 0.
Low-Voltage Detect Interrupt Enable
Enables hardware interrupt requests for LVDF.
4
LVDRE
0 Hardware interrupt disabled (use polling)
1 Request a hardware interrupt when LVDF = 1.
Low-Voltage Detect Reset Enable
This write-once bit enables LVDF events to generate a hardware reset. Additional writes are ignored.
3–2
Reserved
1–0
LVDV
0 LVDF does not generate hardware resets
1 Force an MCU reset when LVDF = 1
This read-only field is reserved and always has the value zero.
Low-Voltage Detect Voltage Select
Selects the LVD trip point voltage (V_LVD).
00 Low trip point selected (V_LVD = V_LVDL)
01 High trip point selected (V_LVD = V_LVDH)
10 Reserved
11 Reserved
14.4.2 Low Voltage Detect Status and Control 2 Register
(PMC_LVDSC2)
This register contains status and control bits to support the low voltage warning function.
While the device is in the very low power or low leakage modes, the LVD system is
disabled regardless of LVDSC2 settings.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
330
Freescale Semiconductor, Inc.