K60P100M100SF2RM Datasheet, PDF (538/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Introduction
• Internal or external reference clock can be used as the FLL source.
• Can be used as a clock source for other on-chip peripherals.
• Phase-locked loop (PLL)
• Voltage-controlled oscillator (VCO)
• External reference clock is used as the PLL source
• Modulo VCO frequency divider
• Phase/Frequency detector
• Integrated loop filter
• Can be used as a clock source for other on-chip peripherals.
• Internal reference clock generator
• Slow clock with nine trim bits for accuracy
• Fast clock with four trim bits
• Can be used as source clock for the FLL. In FEI mode, only the slow Internal
Reference Clock (IRC) can be used as the FLL source.
• Either the slow or the fast clock can be selected as the clock source for the MCU
• Can be used as a clock source for other on-chip peripherals
• Control signals for "the MCG external reference low power oscillator clock
generators are provided:
• HGO, RANGE, EREFS
• External clock from the Crystal Oscillator
• Can be used as a source for the FLL and/or the PLL.
• Can be selected as the clock source for the MCU
• External clock from the Real Time Counter (RTC)
• Can only be used as a source for the FLL.
• Can be selected as the clock source for the MCU
• External clock monitor with reset and interrupt request capability to check for
external clock failure when running in FBE, PEE, BLPE, or FEE modes
• Lock detector with interrupt request capability for use with the PLL
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
538
Freescale Semiconductor, Inc.