K60P100M100SF2RM Datasheet, PDF (723/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 29 External Bus Interface (FlexBus)
FB_CLK
FB_A[Y]
Address
FB_D[X]
Address
Data
FB_RW
FB_TS
FB_ALE
FB_CSn
AA=1
AA=0
FB_OEn
FB_BE/BWEn
FB_TA
AA=1
AA=0
FB_TSIZ[1:0]
TSIZ
Figure 29-37. Basic Write-Bus Cycle (No Wait States)
If wait states are used, the S1 state repeats continuously until the the chip-select auto-
acknowledge unit asserts internal transfer acknowledge or the external FB_TA is
recognized as asserted. The following figures show a read and write cycle with one wait
state respectively.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
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