K60P100M100SF2RM Datasheet, PDF (998/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional Description
MOD = 0x0008
CnV = 0x0005
counter
overflow
channel (n) match in
down counting
channel (n) match in
up counting
counter
overflow
channel (n) match in
down counting
CNT ... 7 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8
channel (n) output
CHnF bit
previous value
TOF bit
Figure 39-185. CPWM Signal with ELSnB:ELSnA = 1:0
76
5 ...
If (ELSnB:ELSnA = X:1), then the channel (n) output is forced low at the channel (n)
match (FTM counter = CnV) when counting down, and it is forced high at the channel (n)
match when counting up (see the following figure).
MOD = 0x0008
CnV = 0x0005
counter
overflow
channel (n) match in
down counting
channel (n) match in
up counting
counter
overflow
channel (n) match in
down counting
CNT ... 7 8 7 6 5 4
channel (n) output
321
01 2 34 5 6 7 8 7 6
5 ...
CHnF bit
previous value
TOF bit
Figure 39-186. CPWM Signal with ELSnB:ELSnA = X:1
If (CnV = 0x0000) or (CnV is a negative value, that is, CnV[15] = 1) then the channel (n)
output is a 0% duty cycle CPWM signal and CHnF bit is not set even when there is the
channel (n) match.
If (CnV is a positive value, that is, CnV[15] = 0), (CnV ≥ MOD), and (MOD ≠ 0x0000),
then the channel (n) output is a 100% duty cycle CPWM signal and CHnF bit is not set
even when there is the channel (n) match. This implies that the usable range of periods
set by MOD is 0x0001 through 0x7FFE (0x7FFF if you do not need to generate a 100%
duty cycle CPWM signal). This is not a significant limitation because the resulting period
is much longer than required for normal applications.
The CPWM mode must not be used when the FTM counter is a free running counter.
Note
It is expected that the CPWM mode be used only with CNTIN
= 0x0000.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
998
Freescale Semiconductor, Inc.