K60P100M100SF2RM Datasheet, PDF (1501/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 51 Universal Asynchronous Receiver/Transmitter (UART)
Addresses: UART0_D is 4006_A000h base + 7h offset = 4006_A007h
UART1_D is 4006_B000h base + 7h offset = 4006_B007h
UART2_D is 4006_C000h base + 7h offset = 4006_C007h
UART3_D is 4006_D000h base + 7h offset = 4006_D007h
UART4_D is 400E_A000h base + 7h offset = 400E_A007h
Bit
7
6
5
4
3
2
1
0
Read
RT
Write
Reset
0
0
0
0
0
0
0
0
UARTx_D field descriptions
Field
7–0
RT
Description
Reads return the contents of the read-only receive data register and writes go to the write-only transmit
data register.
51.3.9 UART Match Address Registers 1 (UARTx_MA1)
The MA1 and MA2 registers are compared to input data addresses when the most
significant bit is set and the associated C4[MAEN] bit is set. If a match occurs, the
following data is transferred to the data register. If a match fails, the following data is
discarded. These registers can be read and written at anytime.
Addresses: UART0_MA1 is 4006_A000h base + 8h offset = 4006_A008h
UART1_MA1 is 4006_B000h base + 8h offset = 4006_B008h
UART2_MA1 is 4006_C000h base + 8h offset = 4006_C008h
UART3_MA1 is 4006_D000h base + 8h offset = 4006_D008h
UART4_MA1 is 400E_A000h base + 8h offset = 400E_A008h
Bit
7
6
5
4
3
2
1
0
Read
MA
Write
Reset
0
0
0
0
0
0
0
0
UARTx_MA1 field descriptions
Field
7–0
MA
Match Address
Description
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1501