K60P100M100SF2RM Datasheet, PDF (1321/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 48 CAN (FlexCAN)
48.3.3 Control 1 Register (CANx_CTRL1)
This register is defined for specific FlexCAN control features related to the CAN bus,
such as bit-rate, programmable sampling point within an Rx bit, Loop Back Mode,
Listen-Only Mode, Bus Off recovery behavior and interrupt enabling (Bus-Off, Error,
Warning). It also determines the Division Factor for the clock prescaler.
Addresses: CAN0_CTRL1 is 4002_4000h base + 4h offset = 4002_4004h
CAN1_CTRL1 is 400A_4000h base + 4h offset = 400A_4004h
Bit 31
30
29
28
27
26
25
24
23
22
R
PRESDIV
W
RJW
Reset 0
0
0
0
0
0
0
0
0
0
Bit 15
14
13
12
11
10
R
LPB
W
9
8
7
6
0
SMP
21
20
19
PSEG1
0
0
0
5
4
3
18
17
16
PSEG2
0
0
0
2
1
0
PROPSEG
Reset 0
Field
31–24
PRESDIV
23–22
RJW
21–19
PSEG1
18–16
PSEG2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CANx_CTRL1 field descriptions
Prescaler Division Factor
Description
This 8-bit field defines the ratio between the PE clock frequency and the Serial Clock (Sclock) frequency.
The Sclock period defines the time quantum of the CAN protocol. For the reset value, the Sclock
frequency is equal to the PE clock frequency. The Maximum value of this field is 0xFF, that gives a
minimum Sclock frequency equal to the PE clock frequency divided by 256. See Section "Protocol
Timing". This field can only be written in Freeze mode as it is blocked by hardware in other modes.
Sclock frequency = PE clock frequency / (PRESDIV + 1)
Resync Jump Width
This 2-bit field defines the maximum number of time quanta that a bit time can be changed by one re-
synchronization. (One time quantum is equal to the Sclock period.) The valid programmable values are 0–
3. This field can only be written in Freeze mode as it is blocked by hardware in other modes.
Resync Jump Width = RJW + 1.
Phase Segment 1
This 3-bit field defines the length of Phase Buffer Segment 1 in the bit time. The valid programmable
values are 0–7. This field can only be written in Freeze mode as it is blocked by hardware in other modes.
Phase Buffer Segment 1 = (PSEG1 + 1) x Time-Quanta.
Phase Segment 2
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1321