K60P100M100SF2RM Datasheet, PDF (127/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 3 Chip Configuration
3.7.3.3 12-bit DAC Reference
For this device VREF_OUT and VDDA are selectable as the DAC reference.
VREF_OUT is connected to the DACREF_1 input and VDDA is connected to the
DACREF_2 input. Use DACx_C0[DACRFS] control bit to select between these two
options.
Be aware that if the DAC and ADC use the VREF_OUT reference simultaneously, some
degradation of ADC accuracy is to be expected due to DAC switching.
3.7.4 VREF Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Peripheral bus
controller 0
Register
access
Transfers
Other peripherals
VREF
Module signals
Topic
Full description
System memory map
Clocking
Power management
Signal multiplexing
Figure 3-42. VREF configuration
Table 3-50. Reference links to related information
Related module
VREF
Port control
Reference
VREF
System memory map
Clock distribution
Power management
Signal multiplexing
3.7.4.1 VREF Overview
This device includes a voltage reference (VREF) to supply an accurate 1.2 V voltage
output.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
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