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K60P100M100SF2RM Datasheet, PDF (65/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual | |||
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Module
Programmable delay block (PDB)
Flexible timer modules (FTM)
Periodic interrupt timers (PIT)
Low-power timer (LPTimer)
Carrier modulator timer (CMT)
Table 2-8. Timer modules
Chapter 2 Introduction
Description
⢠16-bit resolution
⢠3-bit prescaler
⢠Positive transition of trigger event signal initiates the counter
⢠Supports two triggered delay output signals, each with an independently-
controlled delay from the trigger event
⢠Outputs can be OR'd together to schedule two conversions from one input
trigger event and can schedule precise edge placement for a pulsed output.
This feature is used to generate the control signal for the CMP windowing
feature and output to a package pin if needed for applications, such as
critical conductive mode power factor correction.
⢠Continuous-pulse output or single-shot mode supported, each output is
independently enabled, with possible trigger events
⢠Supports bypass mode
⢠Supports DMA
⢠Selectable FTM source clock, programmable prescaler
⢠16-bit counter supporting free-running or initial/final value, and counting is up
or up-down
⢠Input capture, output compare, and edge-aligned and center-aligned PWM
modes
⢠Operation of FTM channels as pairs with equal outputs, pairs with
complimentary outputs, or independent channels with independent outputs
⢠Deadtime insertion is available for each complementary pair
⢠Generation of hardware triggers
⢠Software control of PWM outputs
⢠Up to 4 fault inputs for global fault control
⢠Configurable channel polarity
⢠Programmable interrupt on input capture, reference compare, overflowed
counter, or detected fault condition
⢠Quadrature decoder with input filters, relative position counting, and interrupt
on position count or capture of position count on external event
⢠DMA support for FTM events
⢠Four general purpose interrupt timers
⢠Interrupt timers for triggering ADC conversions
⢠32-bit counter resolution
⢠Clocked by system clock frequency
⢠DMA support
⢠Selectable clock for prescaler/glitch filter of 1 kHz (internal LPO), 32.768 kHz
(external crystal), or internal reference clock
⢠Configurable Glitch Filter or Prescaler with 16-bit counter
⢠16-bit time or pulse counter with compare
⢠Interrupt generated on Timer Compare
⢠Hardware trigger generated on Timer Compare
⢠Four CMT modes of operation:
⢠Time with independent control of high and low times
⢠Baseband
⢠Frequency shift key (FSK)
⢠Direct software control of CMT_IRO pin
⢠Extended space operation in time, baseband, and FSK modes
⢠Selectable input clock divider
⢠Interrupt on end of cycle with the ability to disable CMT_IRO pin and use as
timer interrupt
⢠DMA support
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
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