K60P100M100SF2RM Datasheet, PDF (940/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map and Register Definition
FTM memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access
Reset value
400B_8098 FTM PWM Load (FTM2_PWMLOAD)
32
R/W 0000_0000h
Section/
page
39.3.27/
983
39.3.3 Status and Control (FTMx_SC)
SC contains the overflow status flag and control bits used to configure the interrupt
enable, FTM configuration, clock source, and prescaler factor. These controls relate to all
channels within this module.
Addresses: FTM0_SC is 4003_8000h base + 0h offset = 4003_8000h
FTM1_SC is 4003_9000h base + 0h offset = 4003_9000h
FTM2_SC is 400B_8000h base + 0h offset = 400B_8000h
Bit 31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
0
W
TOF
0
CLKS
PS
Reset 0
Field
31–8
Reserved
7
TOF
6
TOIE
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FTMx_SC field descriptions
Description
This read-only field is reserved and always has the value zero.
Timer Overflow Flag
Set by hardware when the FTM counter passes the value in the MOD register. The TOF bit is cleared by
reading the SC register while TOF is set and then writing a 0 to TOF bit. Writing a 1 to TOF has no effect.
If another FTM overflow occurs between the read and write operations, the write operation has no effect;
therefore, TOF remains set indicating an overflow has occurred. In this case a TOF interrupt request is
not lost due to the clearing sequence for a previous TOF.
0 FTM counter has not overflowed.
1 FTM counter has overflowed.
Timer Overflow Interrupt Enable
Enables FTM overflow interrupts.
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
940
Freescale Semiconductor, Inc.