K60P100M100SF2RM Datasheet, PDF (461/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 21 Direct Memory Access Controller (eDMA)
21.3.10 Set START Bit Register (DMA_SSRT)
The SSRT provides a simple memory-mapped mechanism to set the START bit in the
TCD of the given channel. The data value on a register write causes the START bit in the
corresponding transfer control descriptor to be set. Setting the SAST bit provides a global
set function, forcing all START bits to be set. If the NOP bit is set, the command is
ignored. This allows you to write multiple-byte registers as a 32-bit word. Reads of this
register return all zeroes.
Address: DMA_SSRT is 4000_8000h base + 1Dh offset = 4000_801Dh
Bit
7
6
5
4
3
2
1
0
Read
0
0
0
Write
NOP
SAST
0
SSRT
Reset
0
0
0
0
0
0
0
0
DMA_SSRT field descriptions
Field
7
NOP
6
SAST
5–4
Reserved
3–0
SSRT
Description
0 Normal operation
1 No operation, ignore the other bits in this register
Set All START Bits (activates all channels)
0 Set only the TCDn_CSR[START] bit specified in the SSRT field
1 Set all bits in TCDn_CSR[START]
This field is reserved.
Set START Bit
Sets the corresponding bit in TCDn_CSR[START]
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
461