K60P100M100SF2RM Datasheet, PDF (1384/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional Description
• Waits for all internal activities like arbitration, matching, move-in and move-out to
finish. A pending move-in is not taken into account.
• Ignores its Rx input pin and drives its Tx pin as recessive
• Sets the NOT_RDY and LPM_ACK bits in MCR
• Sends a Stop Acknowledge signal to the CPU, so that it can shut down the clocks
globally
Exiting Stop Mode is done in one of the following ways:
• CPU resuming the clocks and removing the Stop Mode request
• CPU resuming the clocks and Stop Mode request as a result of the Self Wake
mechanism
In the Self Wake mechanism, if the SLF_WAK bit in MCR Register was set at the time
FlexCAN entered Stop Mode, then upon detection of a recessive to dominant transition
on the CAN bus, FlexCAN sets the WAK_INT bit in the ESR Register and, if enabled by
the WAK_MSK bit in MCR, generates a Wake Up interrupt to the CPU. Upon receiving
the interrupt, the CPU should resume the clocks and remove the Stop Mode request.
FlexCAN will then wait for 11 consecutive recessive bits to synchronize to the CAN bus.
As a consequence, it will not receive the frame that woke it up. The following table
details the effect of SLF_WAK and WAK_MSK upon wake-up from Stop Mode. Note
that wake-up from Stop Mode only works when both bits are asserted.
After the CAN protocol engine recognizes the negation of the Stop Mode request, the
FlexCAN negates the LPM_ACK bit.
Table 48-122. Wake-up from Stop Mode
SLF_WAK
0
0
1
1
1
1
WAK_INT
-
-
0
0
1
1
WAK_MSK
-
-
0
1
0
1
MCU
Clocks Enabled
No
No
No
No
No
Yes
Wake-up Interrupt
Generated
No
No
No
No
No
Yes
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.