K60P100M100SF2RM Datasheet, PDF (1096/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map/Register Definition
CMT_CMD1 field descriptions
Field
7–0
MB[15:8]
Description
These bits control the upper mark periods of the modulator for all modes.
42.6.8 CMT Modulator Data Register Mark Low (CMT_CMD2)
The contents of this register are transferred to the modulator down counter upon the
completion of a modulation period.
Address: CMT_CMD2 is 4006_2000h base + 7h offset = 4006_2007h
Bit
7
6
5
4
3
2
1
0
Read
Write
MB[7:0]
Reset
x*
x*
x*
x*
x*
x*
x*
x*
* Notes:
• x = Undefined at reset.
Field
7–0
MB[7:0]
CMT_CMD2 field descriptions
Description
These bits control the lower mark periods of the modulator for all modes.
42.6.9 CMT Modulator Data Register Space High (CMT_CMD3)
The contents of this register are transferred to the space period register upon the
completion of a modulation period.
Address: CMT_CMD3 is 4006_2000h base + 8h offset = 4006_2008h
Bit
7
6
5
4
3
2
1
0
Read
Write
SB[15:8]
Reset
x*
x*
x*
x*
x*
x*
x*
x*
* Notes:
• x = Undefined at reset.
1096
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.