K60P100M100SF2RM Datasheet, PDF (1142/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map/Register Definition
ENET_RDAR field descriptions (continued)
Field
24
RDAR
23–0
Reserved
Receive descriptor active
Description
Set to 1 when this register is written, regardless of the value written. This bit is cleared by the MAC device
when no additional empty descriptors remain in the receive ring. It is also cleared when ECR[ETHER_EN]
transitions from set to cleared or when ECR[RESET] is set.
This read-only field is reserved and always has the value zero.
44.3.4 Transmit Descriptor Active Register (ENET_TDAR)
The TDAR is a command register that the user writes to indicate that the transmit
descriptor ring has been updated (transmit buffers have been produced by the driver with
the ready bit set in the buffer descriptor).
When the register is written, the TDAR bit is set. This value is independent of the data
actually written by the user. When set, the MAC polls the transmit descriptor ring and
processes transmit frames (provided ECR[ETHER_EN] is also set). After the MAC polls
a transmit descriptor that contains a ready bit that is not set, the MAC clears TDAR and
ceases transmit descriptor ring polling until the user sets the bit again, signifying
additional descriptors have been placed into the transmit descriptor ring.
The TDAR register is cleared at reset, when ECR[ETHER_EN] transitions from set to
cleared, or when ECR[RESET] is set.
Address: ENET_TDAR is 400C_0000h base + 14h offset = 400C_0014h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ENET_TDAR field descriptions
Field
31–25
Reserved
24
TDAR
23–0
Reserved
Description
This read-only field is reserved and always has the value zero.
Transmit descriptor active
Set to 1 when this register is written, regardless of the value written. This bit is cleared by the MAC device
when no additional ready descriptors remain in the transmit ring. Also cleared when ECR[ETHER_EN]
transitions from set to cleared or when ECR[RESET] is set.
This read-only field is reserved and always has the value zero.
1142
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.