K60P100M100SF2RM Datasheet, PDF (1718/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional description
53.4.1 Detailed operating mode descriptions
The following sections provide detailed descriptions of the above modes.
53.4.1.1 Normal mode
Normal mode is the simplest mode of the I²S. It transfers data in one time slot per frame.
A time slot is a unit of data and the RCCR[WL] bits define the number of bits in a time
slot. In continuous clock mode, a frame sync occurs at the beginning of each frame. The
following factors determine the length of the frame:
• Period of the serial bit clock (TCCR[DIV2], TCCR[PSR], TCCR[PM] bits for
internal clock or the frequency of the external clock on the STCK port)
• Number of bits per time slot (RCCR[WL] bits)
• Number of time slots per frame (TCCR[DC] bits)
If normal mode is configured with more than one time slot per frame, data transfers only
in the first time slot of the frame. No data transfers in subsequent time slots. In normal
mode, TCCR[DC] values corresponding to more than a single time slot in a frame only
result in lengthening the frame.
53.4.1.1.1 Normal mode transmit
Conditions for data transmission from the I²S in normal mode are:
1. I²S enabled (CR[I2SEN] = 1)
2. Enable FIFO and configure transmit and receive watermark if the FIFO is used
3. Write data to transmit data register (TX)
4. Transmitter enabled (CR[TE] = 1)
5. Frame sync active (for continuous clock case)
6. Bit clock begins (for gated clock case)
When the above conditions occur in normal mode, the next data word transfers into the
transmit shift register (TXSR) from the transmit data register 0 (TX0), or from the
transmit FIFO 0 register, if enabled.
• In continuous clock mode, the data word is transmitted on arrival of frame-sync
preceded by clocks.
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.