K60P100M100SF2RM Datasheet, PDF (120/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Analog
ADC Channel
(SC1n[ADCH])
00111⁵
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
Channel
AD7b
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
Input signal
(SC1n[DIFF]= 1)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Temperature Sensor (Diff)
Bandgap (Diff)⁹
Reserved
-VREFH (Diff)
Reserved
Module Disabled
Input signal
(SC1n[DIFF]= 0)
ADC1_SE7b
ADC1_SE8⁶
ADC1_SE9⁷
Reserved
Reserved
Reserved
ADC1_SE13Reserved
ADC1_SE14
ADC1_SE15
Reserved
ADC1_SE17
VREF Output
ADC1_DM0⁸
ADC1_DM1
Reserved
Reserved
Reserved
Temperature Sensor (S.E)
Bandgap (S.E)⁹
Reserved
VREFH (S.E)
VREFL
Module Disabled
1. Interleaved with ADC0_DP3 and ADC0_DM3
2. Interleaved with ADC0_DP3
3. Interleaved with ADC0_DP0 and ADC0_DM0
4. Interleaved with ADC0_DP0
5. ADCx_CFG2[MUXSEL] bit selects between ADCx_SEn channels a and b. Refer to MUXSEL description in ADC chapter
for details.
6. Interleaved with ADC0_SE8
7. Interleaved with ADC0_SE9
8. Interleaved with ADC0_DM3
9. This is the PMC bandgap 1V reference voltage not the VREF module 1.2 V reference voltage. Prior to reading from this
ADC channel, ensure that you enable the bandgap buffer by setting the PMC_REGSC[BGBE] bit. Refer to the device data
sheet for the bandgap voltage (V_BG) specification.
3.7.1.5 ADC Channels MUX Selection
The following figure shows the assignment of ADCx_SEn channels a and b through a
MUX selection to ADC. To select between alternate set of channels, refer to
ADCx_CFG2[MUXSEL] bit settings for more details.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
120
Freescale Semiconductor, Inc.