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K60P100M100SF2RM Datasheet, PDF (1801/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual | |||
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Appendix A Release Notes for Revision 6
A.11 Signal Multiplexing and Signal Descriptions chapter
changes
⢠Updated pinout diagrams and tables
⢠In 'Port control and interrupt module features' section, updated digital filter clock cycles from 1 to 32.
⢠Updated CMPx_IN signals to 5:0.
⢠In 'System Signal Descriptions' table, modified RESET_b pin to I/O.
⢠For the "Signal Multiplexing and Pin Assignments" table, added the LLWU inputs to the appropriate pin names.
A.12 PORT changes
⢠No substantial content changes
A.13 SIM changes
⢠Updated ADCxTRGSEL, PFSIZE, and EESIZE field descriptions.
A.14 Mode Controller changes
⢠In Modes of Operation section, updated VLPR mode description in Power modes table.
⢠Clarified Very Low Power Run (VLPR) Mode section.
A.15 PMC changes
⢠No substantial content changes
A.16 LLWU changes
⢠No substantial content changes
A.17 MCM changes
⢠No substantial content changes
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1801
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