K60P100M100SF2RM Datasheet, PDF (1091/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
7–0
PH
Chapter 42 Carrier Modulator Transmitter (CMT)
CMT_CGH1 field descriptions
Primary Carrier High Time Data Value
Description
When selected, these bits contain the number of input clocks required to generate the carrier high time
period. When operating in Time mode, this register is always selected. When operating in FSK mode, this
register and the secondary register pair are alternately selected under control of the modulator. The
primary carrier high time value is undefined out of reset. These bits must be written to non-zero values
before the carrier generator is enabled to avoid spurious results.
42.6.2 CMT Carrier Generator Low Data Register 1 (CMT_CGL1)
This data register contain the primary low value for generating the carrier output.
Address: CMT_CGL1 is 4006_2000h base + 1h offset = 4006_2001h
Bit
7
6
5
4
3
2
1
0
Read
PL
Write
Reset
x*
x*
x*
x*
x*
x*
x*
x*
* Notes:
• x = Undefined at reset.
Field
7–0
PL
CMT_CGL1 field descriptions
Primary Carrier Low Time Data Value
Description
When selected, these bits contain the number of input clocks required to generate the carrier low time
period. When operating in Time mode, this register is always selected. When operating in FSK mode, this
register and the secondary register pair are alternately selected under control of the modulator. The
primary carrier low time value is undefined out of reset. These bits must be written to non-zero values
before the carrier generator is enabled to avoid spurious results.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1091