K60P100M100SF2RM Datasheet, PDF (1277/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

clk
reset
bus
Digital Block
Bus interface &
registers
Timer Unit
state of D-
state of D+
Analog Control Unit
Chapter 46 USB Device Charger Detection Module (USBDCD)
Analog Block
Voltage Comparator
Control and
Feedback
Current Sink
D+
D-
Current Source
D- pulldown
enable
Voltage Source
Figure 46-1. Block Diagram
The USBDCD module consists of 2 main blocks:
• A digital block provides the programming interface (memory-mapped registers) and
includes the timer unit and the analog control unit.
• An analog block provides the circuitry for the physical detection of the charger,
including the voltage source, current source, current sink, and voltage comparator
circuitry.
46.2.2 Features
The USBDCD module offers the following features:
• Compliant with the latest industry standard specification: USB Battery Charging
Specification, Revision 1.1
• Programmable timing parameters default to values required by the industry
standards:
• Having standard default values allows for minimal configuration: Set the clock
frequency before enabling the module.
• Programmability allows for flexibility to meet future udpates to the standards.
46.2.3 Modes of Operation
The USBDCD module operating modes are shown in the following table.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1277