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K60P100M100SF2RM Datasheet, PDF (1755/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual
Field
31–0
PDD
Chapter 54 General purpose input/output (GPIO)
GPIOx_PDDR field descriptions
Port data direction
Description
0 Pin is configured as general purpose input, if configured for the GPIO function
1 Pin is configured for general purpose output, if configured for the GPIO function
54.3 Functional description
54.3.1 General purpose input
The logic state of each pin is available via the pin data input registers, provided the pin is
configured for a digital function and the corresponding port control and interrupt module
is enabled.
The pin data input registers return the synchronized pin state after any enabled digital
filter in the port control and interrupt module. The input pin synchronizers are shared
with the port control and interrupt module, so that if the corresponding port control and
interrupt module is disabled then synchronizers are also disabled. This reduces power
consumption when a port is not required for general purpose input functionality.
54.3.2 General purpose output
The logic state of each pin can be controlled via the pin data output registers and pin
output enable registers, provided the pin is configured for the GPIO function.
If a pin is configured for the GPIO function and the corresponding data output enable
register bit is clear then the pin is configured as an input.
If a pin is configured for the GPIO function and the corresponding pin data output enable
register bit is set then the pin is configured as an output and the logic state of the pin is
equal to the corresponding pin data output register.
To facilitate efficient bit banging on the general purpose outputs, pin data set, pin data
clear and pin data toggle registers exist to allow one or more outputs within the one port
to be set, cleared or toggled from a single register write.
The corresponding port control and interrupt module does not need to be enabled to
update the state of the pin output enable registers and pin data output registers (including
the set/clear/toggle registers).
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1755