K60P100M100SF2RM Datasheet, PDF (73/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 3 Chip Configuration
3.2.2.3 Interrupt channel assignments
The interrupt source assignments are defined in the following table.
• Vector number — the value stored on the stack when an interrupt is serviced.
• IRQ number — non-core interrupt source count, which is the vector number minus
16.
The IRQ number is used within ARM's NVIC documentation.
Table 3-4. Interrupt vector assignments
Address
Vector
IRQ¹
NVIC
non-IPR
register
number
2
NVIC
IPR
register
number
3
Source module
Source description
ARM Core System Handler Vectors
0x0000_0000
0
–
–
–
ARM core
0x0000_0004
1
–
–
–
ARM core
0x0000_0008
2
–
–
–
ARM core
0x0000_000C
3
–
–
–
ARM core
0x0000_0010
4
–
–
–
ARM core
0x0000_0014
5
–
–
–
ARM core
0x0000_0018
6
–
–
–
ARM core
0x0000_001C
7
–
–
–
—
0x0000_0020
8
–
–
–
—
0x0000_0024
9
–
–
–
—
0x0000_0028
10
–
–
–
—
0x0000_002C
11
–
–
–
ARM core
0x0000_0030
12
–
–
–
ARM core
0x0000_0034
13
–
–
–
—
0x0000_0038
14
–
–
–
ARM core
0x0000_003C
15
–
–
–
ARM core
Non-Core Vectors
0x0000_0040
16
0
0
0
DMA
0x0000_0044
17
1
0
0
DMA
0x0000_0048
18
2
0
0
DMA
0x0000_004C
19
3
0
0
DMA
0x0000_0050
20
4
0
1
DMA
Initial Stack Pointer
Initial Program Counter
Non-maskable Interrupt (NMI)
Hard Fault
MemManage Fault
Bus Fault
Usage Fault
—
—
—
—
Supervisor call (SVCall)
Debug Monitor
—
Pendable request for system service
(PendableSrvReq)
System tick timer (SysTick)
DMA channel 0 transfer complete
DMA channel 1 transfer complete
DMA channel 2 transfer complete
DMA channel 3 transfer complete
DMA channel 4 transfer complete
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
73