K60P100M100SF2RM Datasheet, PDF (1420/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional Description
49.4.2.3 FIFO Disable Operation
The FIFO disable mechanisms allow SPI transfers without using the TX FIFO or RX
FIFO. The DSPI operates as a double-buffered simplified SPI when the FIFOs are
disabled. The FIFOs are disabled separately; setting the MCR[DIS_TXF] bit disables the
TX FIFO, and setting the MCR[DIS_RXF] bit disables the RX FIFO.
The FIFO Disable mechanisms are transparent to the user and to host software; Transmit
data and commands are written to the PUSHR and received data is read from the POPR.
When the TX FIFO is disabled the TFFF, TFUF and TXCTR fields in SR behave as if
there is a one-entry FIFO but the contents of the TXFR registers and TXNXTPTR are
undefined. Likewise, when the RX FIFO is disabled, the RFDF, RFOF and RXCTR
fields in the SR behave as if there is a one-entry FIFO, but the contents of the RXFR
registers and POPNXTPTR are undefined.
49.4.2.4 Transmit First In First Out (TX FIFO) Buffering Mechanism
The TX FIFO functions as a buffer of SPI data and SPI commands for transmission. The
TX FIFO holds 4 words, each consisting of a command field and a data field. The
number of entries in the TX FIFO is device-specific. SPI commands and data are added
to the TX FIFO by writing to the DSPI PUSH TX FIFO Register (PUSHR). TX FIFO
entries can only be removed from the TX FIFO by being shifted out or by flushing the
TX FIFO.
The TX FIFO Counter field (TXCTR) in the DSPI Status Register (SR) indicates the
number of valid entries in the TX FIFO. The TXCTR is updated every time the DSPI
_PUSHR is written or SPI data is transferred into the shift register from the TX FIFO.
The TXNXTPTR field indicates which TX FIFO Entry will be transmitted during the
next transfer. The TXNXTPTR contains the positive offset from TXFR0 in number of
32-bit registers. For example, TXNXTPTR equal to two means that the TXFR2 contains
the SPI data and command for the next transfer. The TXNXTPTR field is incremented
every time SPI data is transferred from the TX FIFO to the shift register. The maximum
value of the field is equal to the maximum implemented TXFR register number and it
rolls over after reaching the maximum.
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.