K60P100M100SF2RM Datasheet, PDF (331/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 14 Power Management Controller
See the device's data sheet for the exact LVD trip voltages.
NOTE
The LVW trip voltages depend on LVWV and LVDV bits.
NOTE
The reset value of this register depends on the reset type:
• POR -- 0x00
• Other reset -- bits 1-0 are unaffected
Address: PMC_LVDSC2 is 4007_D000h base + 1h offset = 4007_D001h
Bit
7
6
5
4
3
2
1
0
Read LVWF
0
0
LVWIE
Write
LVWACK
LVWV
Reset
0
0
0
0
0
0
0
0
PMC_LVDSC2 field descriptions
Field
7
LVWF
6
LVWACK
5
LVWIE
Low-Voltage Warning Flag
Description
This read-only status bit indicates a low-voltage warning event. LVWF is set when V_Supply transitions
below the trip point or after reset and V_Supply is already below V_LVW.
0 Low-voltage warning event not detected
1 Low-voltage warning event detected
Low-Voltage Warning Acknowledge
This write-only bit is used to acknowledge low voltage warning errors (write 1 to clear LVWF). Reads
always return 0.
Low-Voltage Warning Interrupt Enable
Enables hardware interrupt requests for LVWF.
4–2
Reserved
1–0
LVWV
0 Hardware interrupt disabled (use polling)
1 Request a hardware interrupt when LVWF = 1.
This read-only field is reserved and always has the value zero.
Low-Voltage Warning Voltage Select
Selects the LVW trip point voltage (V_LVW). The actual voltage for the warning depends on
LVDSC1[LVDV].
00 Low trip point selected (V_LVW = V_LVW1H/L)
01 Mid 1 trip point selected (V_LVW = V_LVW2H/L)
10 Mid 2 trip point selected (V_LVW = V_LVW3H/L)
11 High trip point selected (V_LVW = V_LVW4H/L)
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
331