K60P100M100SF2RM Datasheet, PDF (1539/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 51 Universal Asynchronous Receiver/Transmitter (UART)
51.4.2.8.1 Start bit detection
When S2[RXINV] is cleared, the first rising edge of the received character corresponds
to the start bit. The infrared decoder resets its counter. At this time, the receiver also
begins its start bit detection process. Once the start bit is detected, the receiver
synchronizes its bit times to this start bit time. For the rest of the character reception, the
infrared decoder's counter and the receiver's bit time counter count independently from
each other.
51.4.2.8.2 Noise filtering
Any further rising edges detected during the first half of the infrared decoder counter are
ignored by the decoder. Any pulses less than one RT clocks can be undetected by it
regardless of whether it is seen in the first or second half of the count.
51.4.2.8.3 Low-bit detection
During the second half of the decoder count, a rising edge is decoded as a '0', which is
sent to the receiver. The decoder counter also is reset.
51.4.2.8.4 High-bit detection
At 16-RT clocks after the previous rising edge, if a rising edge is not seen, then the
decoder sends a `1' to the receiver.
If the next bit is a `0' which arrives late, then a low-bit is detected according to Low-bit
detection. The value sent to the receiver is changed from `1' to a `0'. Then if a noise pulse
occurs outside of the receiver's bit time sampling period, then the delay of a `0' is not
recorded as noise.
51.4.2.9 Baud rate tolerance
A transmitting device may be operating at a baud rate below or above the receiver baud
rate. Accumulated bit time misalignment can cause one of the three stop bit data samples
(RT8, RT9, and RT10) to fall outside the actual stop bit. A noise error will occur if the
RT8, RT9, and RT10 samples are not all the same logical values. A framing error will
occur if the receiver clock is misaligned in such a way that the majority of the RT8, RT9,
and RT10 stop bit samples are a logic zero.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1539