K60P100M100SF2RM Datasheet, PDF (1753/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 54 General purpose input/output (GPIO)
54.2.3 Port Clear Output Register (GPIOx_PCOR)
Addresses: GPIOA_PCOR is 400F_F000h base + 8h offset = 400F_F008h
GPIOB_PCOR is 400F_F040h base + 8h offset = 400F_F048h
GPIOC_PCOR is 400F_F080h base + 8h offset = 400F_F088h
GPIOD_PCOR is 400F_F0C0h base + 8h offset = 400F_F0C8h
GPIOE_PCOR is 400F_F100h base + 8h offset = 400F_F108h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
W
PTCO
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
GPIOx_PCOR field descriptions
Field
31–0
PTCO
Port Clear Output
Description
Writing to this register will update the contents of the corresponding bit in the Port Data Output Register
(PDOR) as follows:
0 Corresponding bit in PDORn does not change.
1 Corresponding bit in PDORn is set to logic zero.
54.2.4 Port Toggle Output Register (GPIOx_PTOR)
Addresses: GPIOA_PTOR is 400F_F000h base + Ch offset = 400F_F00Ch
GPIOB_PTOR is 400F_F040h base + Ch offset = 400F_F04Ch
GPIOC_PTOR is 400F_F080h base + Ch offset = 400F_F08Ch
GPIOD_PTOR is 400F_F0C0h base + Ch offset = 400F_F0CCh
GPIOE_PTOR is 400F_F100h base + Ch offset = 400F_F10Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
W
PTTO
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
GPIOx_PTOR field descriptions
Field
31–0
PTTO
Port Toggle Output
Description
Writing to this register will update the contents of the corresponding bit in the Port Data Output Register
(PDOR) as follows:
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1753