K60P100M100SF2RM Datasheet, PDF (1212/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional Description
Table 44-80. Transmit FIFO Thresholds Definition (continued)
Register
ENETn_TFWR
Description
When the FIFO level reaches the ENETn_TFWR value and when STRFWD is cleared, the MAC transmit
control logic starts frame transmission before the end-of-frame is available in the FIFO (cut-through
operation).
If a complete frame has a size smaller than the ENETn_TFWR threshold, the MAC also transmits the
frame to the line.
To enable store and forward on the transmit path, set STRFWD. In this case, the MAC starts to transmit
data only when a complete frame is stored in the transmit FIFO.
FIFO write control
TSEM - Section empty TAFL - Almost full
(Core FIFO status) (FIFO write control)
TFWR - Section full TAEM - Almost empty
(MAC transmit start) (MAC read control)
MAC transmit
Figure 44-62. Transmit FIFO Overview
44.4.12 Loopback Options
The core implements external and internal loopback options, which are controlled by the
following ENETn_RCR register bits:
Register Bit
LOOP
Table 44-81. Loopback Options
Description
Internal MII loopback. The MAC transmit is returned to the MAC receive. No data is transmitted to the
external interfaces.
In MII internal loopback, MII_TXCLK and MII_RXCLK must be provided with a clock signal (2.5MHz for
10Mbps and 25MHz for 100Mbps)
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.