K60P100M100SF2RM Datasheet, PDF (1279/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 46 USB Device Charger Detection Module (USBDCD)
46.3.1 USB Signal Descriptions
The following table shows a summary of module signals that interface with the device's
pins.
Table 46-5. USB Signal Descriptions
Signal
Description
I/O
usb_dm
USB D- analog data signal. The analog block interfaces directly to the D-
I/O
signal on the USB bus.
usb_dp
USB D+ analog data signal. The analog block interfaces directly to the D+
I/O
signal on the USB bus.
avdd33¹
3.3v regulated analog supply
I
avss
Analog ground
I
dvss
Digital ground
I
dvdd
1.2 V digital supply
I
1. Voltage must be 3.3v +/- 10% for full functionality of the module. That is, the charger detection function does not work
when this voltage is below 3.0v, and the CONTROL[START] bit should not be set.
NOTE
The transceiver module also interfaces to usb_dm and usb_dp.
Both modules and the USB host/hub use these signal as bi-
directional, tri-state signals.
Information about the signal integrity aspects of the lines including shielding, isolated
return paths, input or output impedance, packaging, suggested external components,
ESD, and other protections can be found in the USB 2.0 specification and in Application
Information.
46.4 Memory Map/Register Definition
This section describes the memory map and registers for the USBDCD module.
Absolute
address
(hex)
USBDCD memory map
Register name
Width
(in bits)
Access
Reset value
4003_5000 USBDCD_CONTROL
32
R/W 0001_0000h
4003_5004 Clock Register (USBDCD_CLOCK)
32
Table continues on the next page...
R/W 0000_00C1h
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1279