K60P100M100SF2RM Datasheet, PDF (1672/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Software restrictions
52.7.1 Initialization active
The driver cannot set SYSCTL[INITA] bit when any of the command line or data lines is
active, so the driver must ensure both PRSSTAT[CDIHB] and PRSSTAT[CIHB] bits are
cleared. And in order to auto clear the SYSCTL[INITA] bit, the SYSCTL[SDCLKEN]
bit must be '1', otherwise no clocks can go out to the card and SYSCTL[INITA] will
never clear.
52.7.2 Software polling procedure
For polling read or write, once the software begins a buffer read or write, it must access
exactly the number of times as the values set in the watermark level register; moreover, if
the block size is not the times of the value in watermark level register (read and write
respectively), the software must access exactly the remained number of words at the end
of each block. For example, for read operation, if the WML[RDWML] is 4, indicating the
watermark level is 16 bytes, block size is 40 bytes, and the block number is 2, then the
access times for the burst sequence in the whole transfer process must be 4, 4, 2, 4, 4, 2.
52.7.3 Suspend operation
In order to suspend the data transfer, the software must inform SDHC that the suspend
command is successfully accepted. To achieve this, after the Suspend command is
accepted by the SDIO card, software must send another normal command marked as
suspend command (XFERTYP[CMDTYP] bits set as '01') to inform SDHC that the
transfer is suspended.
If software needs resume the suspended transfer, it should read the value in
BLKATTR[BLKCNT] to save the remained number of blocks before sending the normal
command marked as suspend, otherwise on sending such 'suspend' command, SDHC will
regard the current transfer is aborted and change BLKATTR[BLKCNT] to its original
value, instead of keeping the remained number of blocks.
52.7.4 Data length setting
For either ADMA (ADMA1 or ADMA2) transfer, the data in the data buffer must be
word aligned, so the data length set in the descriptor must be times of 4.
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.