K60P100M100SF2RM Datasheet, PDF (964/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map and Register Definition
Addresses: FTM0_EXTTRIG is 4003_8000h base + 6Ch offset = 4003_806Ch
FTM1_EXTTRIG is 4003_9000h base + 6Ch offset = 4003_906Ch
FTM2_EXTTRIG is 400B_8000h base + 6Ch offset = 400B_806Ch
Bit 31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
Reserved[bit 8]
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
Reserved[7:0]
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FTMx_EXTTRIG field descriptions
Field
31–8
Reserved
7
TRIGF
This field is reserved.
Description
Channel Trigger Flag
Set by hardware when a channel trigger is generated. Clear TRIGF by reading EXTTRIG while TRIGF is
set and then writing a 0 to TRIGF. Writing a 1 to TRIGF has no effect.
If another channel trigger is generated before the clearing sequence is completed, the sequence is reset
so TRIGF remains set after the clear sequence is completed for the earlier TRIGF.
6
INITTRIGEN
0 No channel trigger was generated.
1 A channel trigger was generated.
Initialization Trigger Enable
Enables the generation of the trigger when the FTM counter is equal to the CNTIN register.
5
CH1TRIG
0 The generation of initialization trigger is disabled.
1 The generation of initialization trigger is enabled.
Channel 1 Trigger Enable
Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.
4
CH0TRIG
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
Channel 0 Trigger Enable
Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.
3
CH5TRIG
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
Channel 5 Trigger Enable
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
964
Freescale Semiconductor, Inc.