K60P100M100SF2RM Datasheet, PDF (1285/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 46 USB Device Charger Detection Module (USBDCD)
46.4.5 USBDCD_TIMER1
Address: USBDCD_TIMER1 is 4003_5000h base + 14h offset = 4003_5014h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
W
TDCD_DBNC
0
TVDPSRC_ON
Reset 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0
USBDCD_TIMER1 field descriptions
Field
Description
31–26
Reserved
This read-only field is reserved and always has the value zero.
25–16
TDCD_DBNC
Time Period to Debounce D+ Signal
Sets the amount of time (in ms) to debounce the D+ signal during the data pin contact detection phase
(while IDP_SRC and RDM_DWN are enabled). Valid values are 1-1023, but the USB Battery Charging
Specification requires a minimum value of 10 ms.
15–10
Reserved
This read-only field is reserved and always has the value zero.
9–0
TVDPSRC_ON
Time Period Comparator Enabled
Sets the amount of time (in ms) that VDP_SRC, IDM_SINK, and the D-/VDAT_REF comparator are
enabled and connected to the D+/D- lines during the charging port detection phase of the sequence. Valid
values are 1-1023, but the USB Battery Charging Specification requires a minimum value of 40 ms.
46.4.6 USBDCD_TIMER2
TIMER2 contains timing parameters. Note that register values can be written that are not
compliant with the USB Battery Charging Specification v1.1, so care should be taken
when overwriting the default values.
Address: USBDCD_TIMER2 is 4003_5000h base + 18h offset = 4003_5018h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
W
TVDPSRC_CON
0
CHECK_DM
Reset 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
USBDCD_TIMER2 field descriptions
Field
31–26
Reserved
Description
This read-only field is reserved and always has the value zero.
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1285