K60P100M100SF2RM Datasheet, PDF (537/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 24
Multipurpose Clock Generator (MCG)
24.1 Introduction
NOTE
For the chip-specific implementation details of this module's
instances see the chip configuration chapter.
The multipurpose clock generator (MCG) module provides several clock source choices
for the MCU. The module contains a frequency-locked loop (FLL) and a phase-locked
loop (PLL). The FLL is controllable by either an internal or an external reference clock.
The PLL is controllable by the external reference clock. The module can select either of
the FLL or PLL output clocks, or either of the internal or external reference clocks as a
source for the MCU system clock. The MCG operates in conjuction with a crystal
oscillator, which allows an external crystal, ceramic resonator, or another external clock
source to produce the external reference clock.
24.1.1 Features
Key features of the MCG module are:
• Frequency-locked loop (FLL)
• Digitally-controlled oscillator (DCO)
• DCO frequency range is programmable for up to four different frequency ranges.
• Option to program and maximize DCO output frequency for a low frequency
external reference clock source.
• Option to prevent FLL from resetting its current locked frequency when
switching clock modes if FLL reference frequency is not changed.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
537